The Aid Of Atmega32, Converted Analog Data Is Kept By Which Registers?

Analog to Digital Converter (ADC):
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used to convert Analog signals to digital value.

Types of ADC:
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1- Ramp Counter ADC:-
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The idea behind this blazon of ADCs is that:
The Counter is Enabled by Zippo (Active LOW). When the desired signal (Vin) > DAC output(which is a voltage also) the comparator output is Zero (0) Enabling the timer to continue to count. When the desired signal is equal to the DAC output, the comparator output is ane disabling the counter from counting. The last value in the Counter is the digital representation of the analog signal.
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The step size is the voltage difference betwixt i digital level (i.e. 0001) and the next one (i.east. 0010 or 0000).

step size = Vref. / (two^Resolution)

(2^Resolution) referred to Number of levels (Quantization).

Ex:
Vref.=5Volt. in 2 bit ADC and so Stride = 5/2^2=5/four=1.25 Volt
so ADC will accept 4 dissimilar digital values(4 Levels) corresponding to analog signals of (0 , 1.25 , 2.5 , iii.75 , 5 Volt)

*Rem:
DAC is unable to produce its Vref. (Max. Voltage) as it is saturated at (Vmax-Footstep) which means the last level (digital representation) will exist the same for (Vmax-Step) to (Vmax).

Analog Value = Digital Representation * Step

Ex: ADC , Vref = 5V , Resolution:eight Bit , Digital Value = 1111 1111

Analog Value = 255 * (5/256) = 4.9804 Volt => ( 5 - 0.0195 ) => (Vmax.-Footstep)

*Annotation:
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-Increasing ADC resolution means increasing ADC accuracy.
-Increasing Vref. means increasing measurement range.

Vref. Calculations:
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Vref is determined according to:

ane- Max. Volt. will exist measured from a sensor/transducer should be less than or equal Vref. of an ADC.
2- Generated Error in measurement. as when a sensor generates a max. volt of 2 is used with two chip ADC with Vref. =5 this will make a step of ( v/4)=ane.25 volt. which means that the ADC volition merely sense 0 and 1.25 Volt of the sensor ! which means a high error in reading the sensor's reading.Merely, if the same ADC is used with Vref. =2Volt that makes the Step=2/4=0.v volt so the ADC will sense the iv levels for the sensor'due south reading (0,0.5,1.5,2)!
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Problems with Ramp. Counter ADC:-
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1- Increasing counter clock volition increment the error in reading the digital representation as the counter will go on to count in a higher place the desired digital representation equally a upshot of the filibuster betwixt moving the digital representation from counter to DAC to convert it to an analog point to be compared with the desired signal.

2- Increasing counter clock volition decrease conversion time and as a result conversion time is non constant.

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2- Successive Approximation ADC (SAR ADC) :-
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It has 3 main Components:
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1- SAR "Successive Approximation Register"
2- Comparator
iii- Command Unit of measurement

The primary thought depends on :
if Analog Volt. (DAC Output) > Vin so the corresponding bit is cleared otherwise it's kept equally 1.

Steps: (Bold: eight Bit SAR ADC , Step Size=10 mV, Vin=1Volt.):-
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1- Starts with binary 1000 0000 (128 in decimal)=> Analog Volt = 128 * ten mV = 1.28 Volt. > Vin
so bit seven is cleared(dropped).
two- 0100 0000 (64 in decimal) => Analog Volt = 64 * 10 mV=640 mV < Vin and so bit half-dozen kept as ane.
3- 0110 0000 (96 in decimal) => Analog Volt=96*x mV=960 mV < Vin then scrap 5 kept as 1.
4- 0111 0000 (112 in decimal) => Analog Volt= 112*10mV=1.12 V > Vin so bit 4 is cleared.
v- 0110 chiliad (108 in decimal) => Analog Volt=108*10mV=1.08V > Vin so it three is cleared.
6- 0110 0100 (100 in decimal) => Analog Volt=100*10mV=1V = Vin and then bit 2 is kept as ane.
7- 0110 0110 (102 in decimal) => Analog Vol=102*10mV=1.02mV > Vin so bit one is cleared.
viii- 0110 0101 (101 in decimal) => Analog Vol=101*10mV=one.01 mV > Vin so it ane is cleared.
9- 0110 0100 is the final representation of 1Volt. input.

Result Afterwards 8 Clock Cycles:
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and so 1 Volt = > 0110 0100
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Advantages:
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Conversion time is constant.

Comparison betwixt Ramp. Counter ADC and SAR ADC:
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3- Flash ADC
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four- Integrator ADC
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ADC peripheral in ATmega32:-
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0.5 LSB Integral Non-linearity:

-Integral Non-linearity :
the maximum departure of the ADC transfer function from the best fit line.

Steps size is non equal as a upshot of using resistors in DAC internally in the ADC this accumulated fault in reading called Integral Non-linear error and equals 0.five Least significant bit (half step) (Integral Non-linearity is expressed in LSBs) because the difference between 2 levels volition happen in the LSB ex: 0000(level 0 on 0V) -> 0001(Level 1 on full pace +/- one-half step) (the change happened is the LSB).

+/-ii LSB Accented Accuracy:
as a result of 0.5 LSB Integral Non-linearity, the absolute mistake in conversion may happen in the least ii significant bits.

13uSec to 260uSec Conversion fourth dimension:
as the SAR ADC based on SAR timer which works with a clock with a prescalar so this prescalar varies the conversion time from thirteen Microsecond (Fast conversion) to 260 Microsecond (Deadening Conversion).

Up to 15 kSPS at Max. Resolution:
At Max. Resolution the ADC(ten bits) can convert 15 Kilo Sample per second (kSPS).
which ways Max. Frequency of a signal that can be converted is 7.5 kHz co-ordinate to Nyquist theory " Sampling frequency should be equal or greater than ii*signal Frequency". That ADC can convert homo voices which have max. frequency of 4 kHz.

eight Multiplexed Single-Ended Input Channel:
ways that there'due south simply one ADC chip but the input of that ADC is branched to eight channels on 8 pins with a multiplexer that determines which one will be the ADC input (only 1 at a time).

7 Differential Input Channels:
ways we can apply

two pins

to convert the deviation betwixt them to a digital value.

utilise instance

: measuring negative voltage, nosotros can employ two pins to practice and so.

2 Differential Input Channels with Optional Gain of 10x and 200x:
ways nosotros can apply ii pins to convert the divergence betwixt them then multiply it with a gain of ten or 200 then catechumen that last value. nosotros can use this feature to dilate a sensor'south output.

Optional Left Aligning for ADC Result Readout:
equally the ADC is 10-chip resolution, information technology occupies two 8 bit registers but we can employ only ten bits starting from the correct (correct adjusted) or 10 bits starting from the left (left adjusted).

0-Vcc ADC Input Voltage Range

Selectable 2.56 V ADC Reference Voltage

Free Running or Single Conversion Style:

Costless Running

means you need but to enable the ADC and conversion will automatically happen and continues and a programmer should read conversion result continuously if needed.

Unmarried Conversion Mode

ways it but converts one time merely then stops.

ADC first Conversion by Machine Triggering on Interrupt Sources:
means ADC will offset conversion when a specific interrupt occurs.

Interrupt on ADC Conversion Complete:
means ADC will generate an interrupt when conversion is completed.

Sleep Mode Noise Canceler:
means that the ADC can be used to wake the micocontroller from the sleep mode with a specific value on ADC pin and the ADC can differentiate between racket and the analog point using this manner.

ADC Driver (ATmega32):-
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Concepts:
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* Polling -Blocking cod: lines of a code cake the remaining code from execution until those lines are executed outset. i.east: while (flag==1);

*Polling-Non Blocking: polling on a flag during the code but non blocking the remaining lawmaking. i.east:
if (flag==i) { /*Code1*/} else {/*Code2*/}

* Not-Blocking (using Interrupts)

* Interrupt Saturation: entering nested interrupts for a long time preventing executing the main code.

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APIs:
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1- ADC_init(void): initializes the following according configuration :
Vref. , ADC Presecaler , ADC Aligning , Enable ADC

two- getADCBlocking(u8 ADC_Channel , u8 * Copy_pu8ADCReading ) :
A- Select ADC Aqueduct
B- Start Conversion
C- Look until conversion finished
D- Read ADC

iii- getADCNonBlocking( u8 ADC_Channel , u8 * Copy_pu8ADCReading ):
A- Select ADC Channel
B- Beginning Conversion
C- Read ADC from ADC ISR

four- ADC_Refresh(void):
A- Start Conversion of a specific channel / starting time channel
B- when the starting time conversion finished, conversion value should exist stored in ADC ISR execution and the second channel conversion should starting time and echo this for a giver channels number.

five- ADCSetCallBack(void (*vPtr)(void)):
executes a specific function when conversion finishes.

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Configurations :-
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#define
- prescalar
-resolution=> 8 or ten $.25
-Vref => internal , internal/two , external
- Number of active channels
- get-go channel
- end aqueduct
- Adjustment (Right Adjusted or Left Adjusted)
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